j/fdr1-modbus-slave
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compare: j:6f73c30de29232d945650d3e53c63d012d3cb901
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No commits in common. "ef54202a8e30508434234774e3f6b2470e6b05eb" and "6f73c30de29232d945650d3e53c63d012d3cb901" have entirely different histories.
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3 changed files with 28 additions and 48 deletions
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3
includes/rtu.h
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@ -8,13 +8,12 @@
// Configuration Modbus RTU // Configuration Modbus RTU
// ───────────────────────────────────────────── // ─────────────────────────────────────────────
#define RTU_SLAVE_ADDR 183 #define RTU_SLAVE_ADDR 0xB7
#define RTU_FC03 0x03 #define RTU_FC03 0x03
#define RTU_FC06 0x06 #define RTU_FC06 0x06
#define RTU_FC16 0x10 #define RTU_FC16 0x10
#define RTU_HR0_ADDR 0x1700 // Position QEI #define RTU_HR0_ADDR 0x1700 // Position QEI
#define RTU_HR1_ADDR 0x1701 // Position cible ARM (micropas)
// ───────────────────────────────────────────── // ─────────────────────────────────────────────
// Timer2 — timeout inter-caractère 3.5× // Timer2 — timeout inter-caractère 3.5×

69
src/rtu.c
View File

@ -43,30 +43,29 @@ static void RTU_SendByte(uint8_t byte)
} }
// ───────────────────────────────────────────── // ─────────────────────────────────────────────
// Réponse FC03 — N registres (max RTU_BUF_SIZE/2) // Réponse FC03 — 1 registre
// ───────────────────────────────────────────── // ─────────────────────────────────────────────
static void RTU_SendFC03(uint16_t *values, uint8_t count) static void RTU_SendFC03(uint16_t value)
{ {
uint8_t buf[RTU_BUF_SIZE]; uint8_t resp[5];
uint8_t byte_count = count * 2;
uint16_t crc; uint16_t crc;
uint8_t i, len;
buf[0] = RTU_SLAVE_ADDR; resp[0] = RTU_SLAVE_ADDR;
buf[1] = RTU_FC03; resp[1] = RTU_FC03;
buf[2] = byte_count; resp[2] = 0x02; // byte count = 2
for (i = 0; i < count; i++) { resp[3] = (value >> 8); // high byte
buf[3 + i * 2] = values[i] >> 8; resp[4] = (value & 0xFF); // low byte
buf[3 + i * 2 + 1] = values[i] & 0xFF;
}
len = 3 + byte_count;
crc = RTU_CRC16(buf, len);
for (i = 0; i < len; i++) crc = RTU_CRC16(resp, 5);
RTU_SendByte(buf[i]);
RTU_SendByte(crc & 0xFF); RTU_SendByte(resp[0]);
RTU_SendByte(crc >> 8); RTU_SendByte(resp[1]);
RTU_SendByte(resp[2]);
RTU_SendByte(resp[3]);
RTU_SendByte(resp[4]);
RTU_SendByte(crc & 0xFF); // CRC low
RTU_SendByte(crc >> 8); // CRC high
} }
// ───────────────────────────────────────────── // ─────────────────────────────────────────────
@ -142,7 +141,7 @@ void RTU_Init(void)
PIE1bits.TMR2IE = 1; PIE1bits.TMR2IE = 1;
// UART RX interrupt // UART RX interrupt
IPR1bits.RCIP = 0; // basse priorité IPR1bits.RCIP = 0; // RX basse priorité
PIE1bits.RCIE = 1; PIE1bits.RCIE = 1;
} }
@ -226,26 +225,11 @@ void RTU_Task(void)
switch (rx_buf[1]) { switch (rx_buf[1]) {
// ── FC03 — Read Holding Registers ──────── // ── FC03 — Read Holding Registers ────────
case RTU_FC03: { case RTU_FC03:
uint16_t resp[2]; if (reg_addr != RTU_HR0_ADDR || reg_count != 1)
uint8_t n = 0;
uint8_t i;
if (reg_count == 0 || reg_count > 2)
goto done; goto done;
if (reg_addr < RTU_HR0_ADDR || reg_addr + reg_count - 1 > RTU_HR1_ADDR) RTU_SendFC03(QEI_ReadPosition());
goto done;
for (i = 0; i < reg_count; i++) {
switch (reg_addr + i) {
case RTU_HR0_ADDR: resp[n++] = QEI_ReadPosition(); break;
case RTU_HR1_ADDR: resp[n++] = arm_target_position; break;
default: goto done;
}
}
RTU_SendFC03(resp, n);
break; break;
}
// ── FC06 — Write Single Register ───────── // ── FC06 — Write Single Register ─────────
case RTU_FC06: case RTU_FC06:
@ -259,8 +243,6 @@ void RTU_Task(void)
ARM_GoToZero(); ARM_GoToZero();
} else if (reg_addr == SPOOL_REG_FREQ) } else if (reg_addr == SPOOL_REG_FREQ)
SPOOL_SetFreq(value); SPOOL_SetFreq(value);
else if (reg_addr == SPOOL_REG_RATIO)
ARM_SetRatio(value);
else if (reg_addr == ARM_REG_GEAR) else if (reg_addr == ARM_REG_GEAR)
ARM_SetGear(value); ARM_SetGear(value);
else if (reg_addr == ARM_REG_OFFSET) else if (reg_addr == ARM_REG_OFFSET)
@ -279,8 +261,8 @@ void RTU_Task(void)
uint8_t byte_count = rx_buf[6]; uint8_t byte_count = rx_buf[6];
uint8_t i; uint8_t i;
// On supporte 0x0800~0x0806, registres contigus // On supporte 0x0800~0x0805, registres contigus
if (reg_addr < REG_CTRL || reg_addr + reg_count - 1 > SPOOL_REG_RATIO) if (reg_addr < REG_CTRL || reg_addr + reg_count - 1 > ARM_REG_RIGHT)
goto done; goto done;
if (byte_count != reg_count * 2) if (byte_count != reg_count * 2)
goto done; goto done;
@ -300,9 +282,8 @@ void RTU_Task(void)
if (value & CTRL_ARM_GO_TO_ZERO) if (value & CTRL_ARM_GO_TO_ZERO)
ARM_GoToZero(); ARM_GoToZero();
break; break;
case SPOOL_REG_FREQ: SPOOL_SetFreq(value); break; case SPOOL_REG_FREQ: SPOOL_SetFreq(value); break;
case SPOOL_REG_RATIO: ARM_SetRatio(value); break; case ARM_REG_GEAR: ARM_SetGear(value); break;
case ARM_REG_GEAR: ARM_SetGear(value); break;
case ARM_REG_OFFSET: ARM_SetOffset(value); break; case ARM_REG_OFFSET: ARM_SetOffset(value); break;
case ARM_REG_LEFT: ARM_SetLeft(value); break; case ARM_REG_LEFT: ARM_SetLeft(value); break;
case ARM_REG_RIGHT: ARM_SetRight(value); break; case ARM_REG_RIGHT: ARM_SetRight(value); break;

2
src/setup.c
View File

@ -25,8 +25,8 @@ void setup(void) {
INTCON3 = 0b11011000; // INT1 interrupt high prio, enabled , wired on DialCLK // INT2 interrupt high prio, enabled , wired on DialCLK INTCON3 = 0b11011000; // INT1 interrupt high prio, enabled , wired on DialCLK // INT2 interrupt high prio, enabled , wired on DialCLK
RCONbits.IPEN = 1; RCONbits.IPEN = 1;
INTCONbits.GIEL = 1; // basse priorité
INTCONbits.GIEH = 1; // haute priorité INTCONbits.GIEH = 1; // haute priorité
INTCONbits.GIEL = 1; // basse priorité
__delay_ms(3000); __delay_ms(3000);